Design engineer

Job Description

Job ID: JR0183773Job Category: EngineeringPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HireDesign engineer for standard cells characterization and CAD viewsJob DescriptionThe position is part of Platform Enablement Solutions Group (PESG) - Technology Enablement Group (TEG) The charter of the group is to enable external foundry ecosystem to the product design teams across various domains - focused on providing optimum IP solutions - including standard cells, memories, IO, ESD EDM and other design collaterals. We work in a highly collaborative environment, interfacing with design teams throughout Intel in a fast paced environment where thinking out of the box is encouraged and rewardedThis position is for senior design engineer in field of standard cell characterization and cad view generation. Selected candidate will work on methodology, implementation of standard cell characterization ,CAD views generation and validation, collaborating with all relevant teams, playing a strategic role of building PPA optimized ,zero bug and cost-effective standard cells libraries. candidate will have the opportunity to integrate and come-up with new ideas, as well as work with a team of hardworking engineers. As a Standard Cell characterization and view generation, validation Engineer for the custom circuits team, candidate will perform the following:Engage with Intel Design teams on standard cell library requirementsEngage with external foundry to understand the technology design platform ,supportive views and guidelines/flows for development and flowDrive and work on methodology and characterization flow of CCS/CCSN/NLDM/LVF/ECSM/EMT/APL views of custom standard cells.Work on characterization and validation of CCS/CCSN/NLDM/LVF/ECSM/EMT/APL views for custom standard cells in different technology, architecture, PDK releases.Work on generation and validation of RTL views and physical views for custom standard cells in different technology, architecture, PDK releases. .Work on Library PPA for different technology, architecture, PDK releases.Work with circuit design engineers and layout design engineers to develop best optimized and cost effective std cell libraryQualificationsBE/B.Tech/ME/M.Tech/MS in Electrical or Electronics EngineeringExperience: 5-7 yearsKey QualificationsExperience in Standard Cell characterization and cad view generation and validation.Strong understanding standard cell characterization methodology and flow.Hands-on experience in industry standard characterization toolsStrong understanding of liberty syntax and timing/Noise/RV modelsStrong understanding of Digital circuits and CMOS devicesHands-on experience to develop and validation std cells Verilog modelsHands-on experience to develop and validate physical cad views[lef,NDM)Very good debugging skills and solving capabilityHands-on experience running SPICE simulationsStrong proficiency in scripting languages like Perl and Tcl.Great teammate with solid communication and analytical skills.Understanding of ASIC flow is plusInside this Business GroupThe Product Enablement Solutions Group (PESG) is a worldwide organization that delivers an end-to-end design system for development of IPs, Cores and SOCs. This business group partners with the Semiconductor, IP and EDA eco-systems and leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to deliver a world-class design system that powers Intel s leadership products.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJR0183773BangaloreProduct Enablement Solutions Group,

Keyskills :
drawingautocaddraftingmodelingcadip solutionslayout designstandard cellproduct designcost effectivecircuit designcollaborative environmentedartlesdedmppaips