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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Consumer Durables / Electronics |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Qualification: BE / ME / B. Tech / M. Tech in EEE/ ECE/ EI/ CSExperience: 4 to 15 YearsNo of Position: 20+ (Including 2 Leads / 2 Experts) Location: BangalorePreference: Candidate from semiconductor back groundRequirements:Strong knowledge of DFT architectures & methodologies. This includes Scan, BScan, IO DFx, analog DFT, JTAG, Boundary scan, etc with minimum experience of 4+ years. Proven knowledge of Verilog , RTL design and micro-architecture skills. Strong knowledge of SoC tools/ methodology (Synopsis VCSand Verdi, Lintra, Spyglass, Tessent ATPG tools, Synopsys ATPG tools, etc) . Strong Si debug skills, ATE requirements and understanding of volume test requirements. Strong Communications skills and the ability to effectively work with cross functional teams across geographies.,
Keyskills :
rtl designboundary scandftsocrtldfxatpgjtagscanverdidesignverilogspyglassboundaryRTL CodingNCSimAMBA AHBTiming Closuresystem integratsemiconduct