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FPGA Implementation / Validation Engineer

20.00 to 25.00 Years   Bangalore   03 Nov, 2021
Marvell India Pvt Ltd
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryConsumer Durables / Electronics
Functional AreaSales / BD
EmploymentTypeFull-time

Job Description

About MarvellAt Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world s leading technology companies for 25 years, we move, store, process and secure the world s data with semiconductor solutions designed for our customers current needs and future ambitions. Through a process of deep collaboration and transparency, we re ultimately changing the way tomorrow s enterprise, cloud, automotive, and carrier architectures transform for the better.The data infrastructure that our customers build has never been more critical to our global economy. It s what s keeping the world connected, businesses running, and information flowing. If you re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.The OpportunitySwitch business unit designs and develops state of the art Ethernet switch products for enterprise, data center and industrial application.Marvell switch includes complex units capable of receiving the packets from the network at a very high speed (10Mbps to 800Gbps) , processing/routing and transmitting the packets back to the network.The FPGA implementation/validation engineer in the team will have ownership over a switch IP unit or several units. The engineer will

  • plan and execute unit and cluster level implementation of RTL, develop the wrapper logic, map the design onto the state of the art FPGA platforms and ensure that the design is meets the quality and performance.
  • Will be responsible for developing testbench in SV/UVM to verify the sanity of the design prior to the FPGA testing.
  • work with architects to understand and influence the units architecture, plan and implement design changes in Verilog or SV, plan and implement verification environment in UVM, and execute the verification plan until all quality criteria are met.
Industry experience:
  • Design/RTL experience in Verilog or SV is a must.
  • Proficient in FPGA tools such as Synplicity, Xilinx ISE and ChipScope usage
  • Experience in FPGA timing constraints, timing analysis, clock domain crossing.
  • Knowledge of scripting languages, such as PERL, Python.
  • Verification experience in SV, UVM is an advantage.
Added advantage:
  • Ethernet protocols (IEEE 802.3, 802.1Q, 802.1D, Routing protocols) preferred.
  • L2 / L3 / L4 Ethernet protocol knowledge
  • Encryption / Authentication algorithms.
  • Precision Time Protocol (PTP, IEEE-1588)
General :
  • Good learning , problem solving interpersonal and communication skills.
  • Ability to be a part of a team, working in cooperation.
  • Self-motivated team player able to thrive in a fast-paced engineering environment
#LI-MS1The PerksWith competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We ll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page.Your FutureMarvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.,

Keyskills :
data centerproblem solvingperldebuggingtiming analysisisefpgartlartcustomer relationstest casesxilinx iseexcelvalidationuvmmapintel

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