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Intern -OTP Memory Design

1.00 to 5.00 Years   Bangalore   08 Nov, 2021
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryManufacturing
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

*Global Foundries (GF) Bangalore is seeking a highly skilled and motivated semiconductor development engineer for an internship position . The student will work at GF, Bangalore on

  1. OTP memory : e-Fuse based IP
  2. Analog IP: ADC, DAC, PLL, BG and LDO etc.
  3. Power Management IP: Low Voltage and High Voltage LDO, BG, DC-DC Buck, DC-DC Boost, DC-DC Buck-Boost and High output current regulators for automotive application etc.
Part B: Essential Responsibilities Include:Essential Responsibilities :
  • OTP memory : e-Fuse based IP
  • Analog IP: ADC, DAC, PLL, BG and LDO etc.
  • Power Management IP: Low Voltage and High Voltage LDO, BG, DC-DC Buck, DC-DC Boost, DC-DC Buck-Boost and High output current regulators for automotive application etc.
  • The responsibility includes complete understanding of circuit topologies, best class architecture development, Design from Specifications, Sub-Block circuit design, guidance to layout effort and review etc.
Part C: Please complete the following Objectives Questionnaire:The intern/Co-Op will work directly with existing team working on circuit architecture development from spec, IP-Level/Block-Level Circuit Design, Simulations, Results Documentation for review, PDK assessment with IP, Layout Design and Layout verification. The assignment would involve getting exposure to leading edge foundry EDA tools, design flows, and yield / design interaction., *Required Qualifications:
  • PhD/M.Tech Student enrolled in an accredited program on Electronics Engineering, VLSI Design, Microelectronics
  • Minimum of 3 months experience with UNIX environment.
  • Excellent academic standing.
  • Attention to detail and Learning skills
  • Self-motivated; able to take ownership of assignments, develop work plans and proactively seek feedback to ensure objectives are aligned and met.
  • Strong written and oral communications skills.
  • Team player; able to succeed in a dynamic, fast paced environment.
Preferred Qualifications: Example:
  • PhD/M.Tech Student from reputed academic Institutes in India (Ex: IITs or NITs or BITs))
  • VLSI design courses / experience with any domain listed above in Part B.
  • Familiarity with CADENCE/SYNOPSYS design system.

Keyskills :
eda toolsvlsi designhigh voltagelayout designcircuit designpower managementelectronics engineeringarchitecture developmentedadacadcldopdkotpvlsiunixedgeboostdcdc

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