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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Job Category: EngineeringPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HireIP Logic Design Engineer Clocking and PLL IPJob DescriptionPerform logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units for PLLs.Participate in the development of Architecture and Microarchitecture specifications for the Logic components.Provide IP integration support to SoC customers and represents RTL team.Work on high-speed digital design and is targeted towards low power optimized implementations of high speed PLLsImplement RTL in System Verilog, validating the design through functional sims and take it through FE flows.QualificationsCandidate must have a Bachelors degree in Electrical Engineering and 4+ years experience or a Masters degree in Electrical Engineering and 3+ years experience Required Qualifications: RTL level Digital IC Design using System Verilog and/or Verilog Low power design, Analog design concerns and driving to an optimal solution between analog and digital designs Pre-silicon and post-silicon validation Preferred Qualifications: Prior experience in/with: Logic design using System Verilog Low-power design using UPF and clock gating Multiple clock domain design Exposure to LINT, CDC, LEC, timing/synthesis Exp in Regression, code coverage, GLS etc.Inside this Business GroupIP Engineering Groups (IPG) vision Build IPs that power Intels leadership products and power our customers silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intels silicon design process. IPGs guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and,
Keyskills :
controllingdiagnosticsfftgsmdigital ic designic designlogic designanalog designcode coveragesystem verilogdigital designcadencehighspeed digital design