hireejobs
Hyderabad Jobs
Banglore Jobs
Chennai Jobs
Delhi Jobs
Ahmedabad Jobs
Mumbai Jobs
Pune Jobs
Vijayawada Jobs
Gurgaon Jobs
Noida Jobs
Oil & Gas Jobs
Banking Jobs
Construction Jobs
Top Management Jobs
IT - Software Jobs
Medical Healthcare Jobs
Purchase / Logistics Jobs
Sales
Ajax Jobs
Designing Jobs
ASP .NET Jobs
Java Jobs
MySQL Jobs
Sap hr Jobs
Software Testing Jobs
Html Jobs
IT Jobs
Logistics Jobs
Customer Service Jobs
Airport Jobs
Banking Jobs
Driver Jobs
Part Time Jobs
Civil Engineering Jobs
Accountant Jobs
Safety Officer Jobs
Nursing Jobs
Civil Engineering Jobs
Hospitality Jobs
Part Time Jobs
Security Jobs
Finance Jobs
Marketing Jobs
Shipping Jobs
Real Estate Jobs
Telecom Jobs

Post Si Validation Lead Stress and Stability

7.00 to 12.00 Years   Bangalore   17 Nov, 2021
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

Job ID: JR*******Job Category: EngineeringPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HirePost Si Validation Lead Stress and StabilityJob Description Our team is responsible for Silicon level HW architectural validation and accountable to find design implementation bugs through post si system level validation As a Post Silicon Validation Engineer (Client Microprocessor Hardware), you are required to create, define and develop system validation environment & test suites optimized for a CPU or its subsystems like memory controller, Power management, PCIe, USB/TCSS, Serial IO, Graphics, media, audio and other modules of given complexity. Uses and applies emulation and platform-level tools and techniques to ensure functionality and performance as per spec. You are responsible for the development of methodologies, execution of validation plans/ coverage, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on-die debug features. You are responsible in validating the functionality of new architectural features of next generation designs by developing test plans, tests content, coverage points or test tools. You are focal point between a number of Architecture, Design, System software developers and Validation teams within Intel and across different sites.Qualifications Bachelors/Masters in Hardware Engineering or Electrical/Electronics Engineering or Computer Engineering or Computer Science with minimum 7 years to 15 years (Domain Lead position) of related work experience. Candidate Must have high degree of Hardware architecture/ microarchitecture experience in CPU/SoC/Chipset/and one of the subsystems areas given below Strong knowledge and skills of Intel IA (IA32 architecture with uArch debug knowledge of Intels Core and Uncore or equivalent architecture.) Solid understanding of one of the following domain Industry spec, associated technologies and architecture: USB architecture who familiar in USB Bulk/Interrupt/Isochronous transfer, Type of USB, Host/Device relationship, Transmission etc. Knowledge of IA/ARM core and system level Power Management architecture who familiar in PMC feature, VID setting, Gate/Chip level power management transition state etc. Understanding of System Reset and Thermal related Validation expertise is a plus. PCIe architecture who familiar in PCIe interconnect, link, Lane, Configuration, Interrupt, I/O Read/Write, PCIe Layer, Form Factor etc. Deep understanding of memory Controller / DDR (2/3/4) memory architecture and debug. LPDDR knowledge is a plus. Deep understanding of Graphics, media, Audio, Camera interface, imaging and printing , flash storage technology architecture and debug. Solid understanding of the Validation and Debug flows of a complex CPU Silicon: Knowledge on Validation/ Debug Flows and overall SOC Architecture. Pre-silicon Design / Validation knowledge is a value add. Good working knowledge in C++/Python SW programming for content development and scripting. Knowledge of Verilog/VHDL and EDA design tools and pre si validation methodology is a plus. Excellent written and oral communications and experience working in a cross functional team environment are essential. Good Team Player. Processes strong problem solving, analytical and debug skills.Inside this Business GroupThe everyday contributions of the Intel Validation Engineering (iVE) team are essential to retaining/regaining Intels product leadership. We validate, debug, and tune the newest designs and world-changing technologies that enrich the lives of every person on earth. We play a critical role in completing the PRQs of Intel products and in Intels ability to deliver the annual technology platforms in our roadmap.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJR*******BangaloreIntel Validation Engineering,

Keyskills :
computer sciencepower managementprint brokeringsystem softwaretest suitessilicon validationproblem solvingsystem integratorscontent developmenthardware engineeringbehavioral trainingfocal point

Post Si Validation Lead Stress and Stability Related Jobs

© 2019 Hireejobs All Rights Reserved