Senior Design Engineer

Job Description

Job ID: JR*******Job Category: EngineeringPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HireSenior Design EngineerJob DescriptionResponsibilities : In this position, the candidate will be responsible for design of soft IP cores for Intels next generation chips (including SOCs) for the different market segments.QualificationsQualification : Master of Science (or a Master of Technology) degree in Electrical Engineering with more than seven years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than nine years of relevant industry experience. Experience : Relevant ASIC design/validation experience in front end processes including RTL development, functional and performance verification Expertise in design, development and integration of design blocks (IP) for system-on-chip (SoC) components Expertise in verilog and system verilog based logic design Experience in synthesis flow and timing closure Experience in one/more of the following areas PCIe, USB, DP and /or AMBA standards (OCP, AXI, AHB etc.) Knowledge of SVA Knowledge of IO interconnect is a plus Looking for highly motivated individuals and ability to deal with ambiguity Knowledge of considerations for performance, power and cost optimization is desirable Ability to work in a team environment Ability to work with external technology companies for combined development of IPs / SOCs Experience in FPGA will be a plusInside this Business GroupIP Engineering Groups (IPG) vision Build IPs that power Intels leadership products and power our customers silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intels silicon design process. IPGs guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at and not fall prey to unscrupulous elements.INExperienced HireJR*******BangaloreIP Engineering Group (IPG), Job ID: JR0195388Job Category: EngineeringPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HireSenior Design EngineerJob DescriptionResponsibilities : In this position, the candidate will be responsible for design of soft IP cores for Intels next generation chips (including SOCs) for the different market segments.QualificationsQualification : Master of Science (or a Master of Technology) degree in Electrical Engineering with more than seven years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than nine years of relevant industry experience. Experience : Relevant ASIC design/validation experience in front end processes including RTL development, functional and performance verification Expertise in design, development and integration of design blocks (IP) for system-on-chip (SoC) components Expertise in verilog and system verilog based logic design Experience in synthesis flow and timing closure Experience in one/more of the following areas PCIe, USB, DP and /or AMBA standards (OCP, AXI, AHB etc.) Knowledge of SVA Knowledge of IO interconnect is a plus Looking for highly motivated individuals and ability to deal with ambiguity Knowledge of considerations for performance, power and cost optimization is desirable Ability to work in a team environment Ability to work with external technology companies for combined development of IPs / SOCs Experience in FPGA will be a plusInside this Business GroupIP Engineering Groups (IPG) vision Build IPs that power Intels leadership products and power our customers silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intels silicon design process. IPGs guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at and not fall prey to unscrupulous elements.INExperienced HireJR0195388BangaloreIP Engineering Group (IPG),

Keyskills :
autocadcaddrawingmodelingmechanicalfront endlogic designsystem verilogtiming closurertl developmentcost optimizationbehavioral trainingelectrical engineeringoptimization strategies