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Job Location | Hyderabad |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | Consumer Durables / Electronics |
Functional Area | Sales / BD |
EmploymentType | Full-time |
Hi Good day to you.! Openings in Hyderabad & Bangalore (US based Semiconductor MNC) please go through the Job Descriptions & let me know your interest for the same. Company Name will be Disclosed With your Interest Here attaching the JD for your reference Block level RTL (Verilog or System Verilog) design from micro-architecture level specifications. Implementation of Low power logic, targeting power, performance, area, and timing goals. Linting, CDC, LEC and preferably Low Power check tools to implement design and check design quality Work with Design Verification team on block and top-level functional/gate level verification and code coverage, including Power aware debug. Note : If you are not Interested, Kindly refer any of your Friends/colleagues with 3+ yrs Thanks & Regards Bala Koppu Technical Recruiter bala@cambio.co.in,
Keyskills :
safetycommissioning siteinspection troubleshootingcode coverage design verification