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| Job Location | Hyderabad |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | General / Other Software,Engineering Design / Construction |
| EmploymentType | Full-time |
Experience: 5 yearsFull-chip DFT working experience with multiple design Tape OutsBlock level and Chip level SCAN insertion, DRC, ATPG, MBIST, Sims & Coverage improvements.Expertise in Scan Compression(EDT/OPMISR), MBIST, BSCAN, ATPG implementation and verification.Hands on Experience with industry standard DFT EDA tools & flowsGood Knowledge of cross functional domains (SYN, LEC, STA, PD) with owner ship of constraints developments & LEC.Excellent problem solving and debugging skills. Proactive in nature.Develop/automate flows and scripts in Perl/Tcl to enhance the DFT methodologies & processLeading junior teams, Mentoring/Training and Project leadership.Excellent Customer interaction, Communication and Team work skillsSkills & ExperienceATPG (at-speed & stuck-at), At Speed Scan, Design for Testability (DFT), DFT,
Keyskills :
atpgdftscancoresiliconeda toolsscan insertionproblem solvingadvanced analyticsworking experiencecustomer interactiontechnology solutionsglobal engineering