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Job Location | Noida |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | Manufacturing |
Functional Area | General / Other Software |
EmploymentType | Full-time |
ST being an employer for diverse talent thru employee testimonials and personal experiences; customizable spotlights that highlight important of diversity. Return to work program help drive more equitable outcome for women professionals, who have taken breaks from the workplace for few years. The current opportunity is open to female candidates, who have taken career break between 1 to 5 years processes the relevant skills set as mentioned in this Job Description. ST commitment to DEI diversity, equity, and inclusion.As a part of SRAM Layout design team, you would be working on1) Development of Memory Leafcell design as per the need of SRAM compiler architecture and Specifications2) Stitching of memory leafcells to make a top level circuit abstraction3) Verification of leafcells/circuit blocks including analysis of circuit behavior, timing marginalities, correct description of timing characterization intent on both pre and post layout netlist across the entire PVT space and compiler cut space.4) Documentation and synthesis of results along with closure of all review actions., Candidate must have a Bachelor or Master in Electronics with an excellent academic record. In-depth understanding of circuit fundamentals with a good academic exposure to digital and analog circuit design is a must. Any previous exposure to Memory design and characterization and associated CAD tools (Schematic editor, Spice Simulators, Characterization Infrastructure etc.) during academic curriculum or Industrial training would be an added advantage. Candidate must have good communication skills and ability to work efficiently in a team
Keyskills :
analog circuit designcad toolslayout designcircuit designindustrial trainingdesign