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System Validation Engineer

2.00 to 5.00 Years   Pune   12 Nov, 2019
Job LocationPune
EducationNot Mentioned
SalaryNot Disclosed
IndustryTelecom / ISP
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

We are looking for self-motivated engineers at all levels (junior, senior, lead) who will perform device level and system level validation and debugging of ASIC designs both in emulation and in post-silicon environments.Validation using emulation is very important in meeting verification and bring-up milestones for complex ASIC designs, so that we can enable faster time to market by reducing the risk of multiple tapeouts.In this role, you will work directly with ASIC designers, verification engineers and software teams to validate our ASIC designs using emulation based prototyping. You need to have ability to lead features to their completion, to understand critical issues and come up with optimal solutions to resolve them. You should willing to learn continuously and collaborate with other team members.Your job responsibilities will also include:Designing pre- and post-silicon validation planCompiling projects targeting our emulation prototyping platformsDeveloping and running test software for comprehensive memory tests, high-speed DMA transfers, peripheral IO tests and functional feature tests on the emulation platform and for post-silicon validation (as built-in-self-test)Debugging test failures and simulation/emulation mismatchesBringing up multiple ARM/DSP cores to run Linux and external peripheral interfaces (e.g., SERDES, Ethernet, SPI/I2C) on the emulation platformsAssisting in the hardware and lab bring-up and verification of our ASICs in post-silicon validationKey requirementsBE, BS or BTech in Computer Science/Electrical Engineering or equivalent technical experienceKnowledge about software and hardware partitioningExperience in developing firmware and software for emulation and validationDemonstrated software development experience in C, C++ and/or scripting languages (Python), hardware debug tools (ARM JTAG) and software debug tools (GDB)Experience in hardware emulation and/or FPGA-based platforms and tools, including synthesis and timing closureComfortable reading schematics and data sheetsExperience in writing ASIC erratasNice to have:MS, M-Eng, M-Tech or PhD in Computer Science or Electrical EngineeringGood understanding of computer architecture including industry standard interfaces and memory subsystemsGood understanding of DSP processors (Tensilica etc)Good understanding of real-time OS abstractionsExperience with board bringup, hands-on ASIC bringup, Xilinx/ Altera design tools (Chipsope, etc), familiarity with oscilloscopes, logic analyzers etcExperience with RTL design, Verilog and simulation (VCS, Questa etc), and/or System VerilogExperience with version control systems, collaboration tools (wikis, ticket systems)We are hiring for junior, senior and lead positions based on experience.,

Keyskills :
validation intel automation actuators unctionaltesting collaborationtools rtldesign computerscience behavioraltraining boardbringup versioncontrol

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