Dear All
We are hiring for the belowSr. Engineer/Lead Engineer HW Design positions
1528 Must have Skills (Mandatory):
High speed board design, Processor based design exp,
Roles & Responsibilit...
cpu based designprocesser based design
Test Engineer
Exp- 1 to 3 yrs
Location- Bangalore
Np- 15days to Immediate
JD for Product Testing/Validation
Experience: 1-3 years
Education: BE/ B.Tech, ME/ M.Tech
1) Must have good unders...
usdvalidationtesting
RTL Principal Design Engineer
Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for -
-Defining microarchitecture of digital blocks involving microcontroller-...
Must haves requirements-
Notice Period Only Serving notice period candidates/ Immediate joiners/ 1 month NP
Location: Bangalore - should be located in Bangalore
Experience: (5 to 13 Year...
Principal PCIe RTL Design Engineer
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Position Description
Lead PCIe Verification Enigneer
About the job
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Test Engineer
Exp- 1 to 3 yrs
Location- Bangalore
Np- 15days to Immediate
JD for Product Testing/Validation
Experience: 1-3 years
Education: BE/ B.Tech, ME/ M.Tech
1) Must have good unders...
usdvalidationtesting
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the tra...
FPGA- Designing-C2H
4 to 10 Years of experience in FPGA Design & Development using VHDL
Bus Interfaces - A818, DVI/LVDS, PCIe, AXI, Ethernet, CPRI, SPI, UART, I2C, etc,.Inter...
spivhdlxilinx vivado
FPGA- Designing-C2H-Capgemini
4 to 10 Years of experience in FPGA Design & Development using VHDL
Bus Interfaces - A818, DVI/LVDS, PCIe, AXI, Ethernet, CPRI, SPI, UART, I2C, ...
spivhdlxilinx vivado
ASIC/SOC/IP Verification plan definition, testbench environment development in System Verilog/UVM
Design verification at RTL/Gate level, DV Coverage analysis, Coverage improvement at block and C...
test casesddrpcieobjectsanalysisethernetprotocolTest Strategy
You will directly interface with customers - understand their requirements, draft design documents and test specifications. You will be responsible for...
matlabc++
Want to help shape how connected devices get to market faster Join the new initiative Amazon Common Software (ACS) for Devices which launched Feb 2020 (https://developer.amazon.com/acs-devices). ...
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FPGA- Designing-C2H-Capgemini
4 to 10 Years of experience in FPGA Design & Development using VHDL
Bus Interfaces - A818, DVI/LVDS, PCIe, AXI, Ethernet, CPRI, SPI, UART, I2C, ...
spivhdlxilinx vivado
Bosch Group 4.00 to 6.00 Years Bangalore 06 Apr, 2023
Job Description
Work experience in digital (Microcontrollers/Microprocessor, related power supply etc.) & high-speed digital (PCIe, Gigabit ethernet, DDR etc.) design & development.
Need R&D Engineer for Acceleration IP and Virtual Emulation
Job Description
Experience of Verification IP Development.
Experience with Hardware Design and Verification.
Knowledge of QEMU, device...
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You will directly interface with customers - understand their requirements, draft design documents and test specifications. You will be responsible for...
cantata++matlab
You will directly interface with customers - understand their requirements, draft design documents and test specifications. You will be responsible for...
matlabc++
The data infrastructure that our customers build has never been more critical to our global economy. Its whats keeping the world connected, businesses running, and information flowing. If youre re...
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The Opportunity
Marvell is a leading provider of innovative storage technologies, including ultrafast read channels, highperformance processors, leading edge transceivers, highly efficient anal...
uvmverificationdesign
Automation in any of the : SSD/Storage or Algorithm/ PCIe/BLE/ etc.
Strong in Python with oops concepts. Regular Expressions, File Handling, Strings, lists, dictionary, Decorators, Different Lib...
algorithmspciebleandroid adb
You will directly interface with customers - understand their requirements, draft design documents and test specifications. You will be responsible for...
cantata++c++
Exp : 3yrs to 10 years
Associated with Verification especially using industry-standard protocols & methodology
Languages: Hands-on experience withSystem Verilog & Veril...
pcievmmovmverilogsystem verilog
The data infrastructure that our customers build has never been more critical to our global economy. Its whats keeping the world connected, businesses running, and information flowing. If youre re...
lightingestimation3d modellingahu