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Job Location | Ahmedabad |
Education | Not Mentioned |
Salary | Rs 2.5 - 6 Lakh/Yr |
Industry | Engineering / Construction |
Functional Area | Embedded, VLSI |
EmploymentType | Full-time |
Company: Agasthya App LabsDesgnation: Design Verification EngineerSkill Set: SOC/IP VerificationMethodology: SV,UVMProtocols: Ethernet,USB,PCLE,MIPIExperience: 3.5-10 yearsLocation: Pune,Ahmedabad,BangaloreIf anyone interested,please send me updated CV to mail id - aparna.n@agasthyaapplabs.comorcontact - 7794067150
Keyskills :
axiamba ahbuniversal verification methodologyethernetuvmusbdesign verificationopen verification methodologyapbuartmipipcle