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ASIC Design Manager

8.00 to 13.00 Years   Bangalore   25 Jun, 2021
Job LocationBangalore
EducationNot Mentioned
SalaryRs 40 - 50 Lakh/Yr
IndustryIT - Software
Functional AreaEmbedded, VLSI
EmploymentTypeFull-time

Job Description

Technical Lead/Manager - ASIC DesignExp : 8-15 yrsLocation : BangaloreJob Profile The successful candidate will be involved in hands-on implementation of complex networking ASIC and will be responsible for IP/ sub-system level micro-architecture development and RTL coding. He/She will work on every aspect of ASIC design, working closely with the SW, collaborating design and verification teams. The ideal candidate would have owned complex design modules and taken it from concept to silicon. Must have good understanding of digital design fundamentals and a strong back ground of ASIC design and having experience in any of the industry standard tools. Should be conversant with synthesis and timing closure flows and concepts.Requirements

  • A minimum of about 8-15 years experience in the area of Serial Protocols IPs or Subsystems.
  • Design experience with PCIe is must
  • Should have worked on PCIe controller or application logic and have thorough knowledge
of physical, transaction, and datalink layers
  • Proficient in RTL design using Verilog and also in verification languages
  • Exposure to Synthesis and timing closure flows.
  • Knowledge of AMBA protocols ACP/AXI/AHB/APB is desirable
  • Desirable to have candidate with a back ground in architecture definition.
  • Desirable to have experience with low power design.
  • Exposure to mixed signal design and backend flow is desirable but not must.
Qualification BE/MTECH in ECE or equivalent

Keyskills :
pciedigital designserial protocolssignal designrtl designrtlsynthesisasic designtiming closureambaertmsasicipsamba protocols

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