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Job Location | Bangalore |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | Manufacturing |
Functional Area | General / Other Software |
EmploymentType | Full-time |
Job DescriptionTasks: - Verification SoCs, automotive ASICs, subsystems, IPs.- Application of Metric-driven Verification (MDV) and/or Formal Verification methodologies- Developing and tracking of Verification plans-Develop verification environments from scratch-Create VIP- Integration of VIP ( Verification-IP )- Measure and analyze regression results- Continuous improvement of verification methods/tools/flows/processes together with EDA partnersRequirement: - Must have been a part of one or more ASIC/SoC tape outs.- knowledge of VHDL/VERILOG based test environment.- Sound knowledge of constrained random verification , OVM/UVM- Sound knowledge in SV.- Experience of developing functional coverage code , coverage analysis.- Experience of developing verification environments from scratch is desirable.- Formal verification experience is a desirable but not must.- SPECMAN knowledge is a desirable but not must.- Good hands on experience with cadence/Synopsys/Mentor tools.- Exposer to configuration management, bug tracking tool etc.- Knowledge of scripting language, Perl TCL etc.-Good experience with AMBA protocols- Working knowledge on ARM processor based subsystem/SoC verification,
Keyskills :
bug tracking toolbug trackingarm processorformal verificationcontinuous improvementconfiguration management