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Chip Verification Lead

10.00 to 12.00 Years   Bangalore   21 Jan, 2020
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryConsumer Durables / Electronics
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

Job Area Engineering - Verification Location India - Bangalore Job Overview QCT is currently seeking digital verification engineers for the mixed-signal ASICs that support QCTs mobile platforms for next generation 5G RFIC/PMIC/Codec technologies. Successful candidates will be working on the following: - Block/Subsystem/SoC level digital IP verification using constrained-random coverage methodologies at both RTL and Gate Level. The skills involved includes SV/UVM/UVM_REG/Randomization/Coverage/SVA. Minimum Qualifications - 10-12 years, preferably with product organizations- Should have developed and worked on SV/UVM based testbenches - Working knowledge of Object-Oriented SystemVerilog principles using UVM/OVM/VMM methodologies. id= hdnMinimumQualifications >-Minimum Bachelors degree in Electrical Engineering or Computer Engineering, Masters preferred- 10-12 years, preferably with product organizations- Should have developed and worked on SV/UVM based testbenches - Working knowledge of Object-Oriented SystemVerilog principles using UVM/OVM/VMM methodologies. Preferred Qualifications -Experience in writing Test Plans independently -Experience with debugging RTL & Gate level simulations -Experience with Functional Coverage &Code Coverage -Experience with Scripting in perl, python, tcl -Experience in planning Verification architecture, review testbench/ testplans with juniors, identify coverage gaps, propose alternate methods for coverage - Should have been involved in leading a chip DV effort - Silicon Debug Experience a plus. - Experience with Mixed Signal Designs involving DSP - Modeling Experience with Matlab, Octave a plus Education Requirements Preferred: Masters, CS or EE*LI-IND id= hdnEducationalRequirements >Required: Bachelors, CS or EEPreferred: Masters, CS or EE*LI-IND Keywords SV,Verification,UVM,DV,validation,

Keyskills :
mixed signalmobile platforms commercial modelselectrical engineering pythonmatlab

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