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Experience in power modeling methodologies and low power optimization

5.00 to 7.00 Years   Bangalore   08 Jul, 2019
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

Skills Good understanding of concepts of power consumption , power estimation and low power design Good understanding of power considerations at architectural , block and circuit levels Experience in low power ASIC design implementation , power simulation and analysis flow , and ASIC physical design methodology Experience in power modeling methodologies and low power optimization Familiarity with Power Integrity and recognizing DC and AC losses Familiarity with UPF and / or CPF power intent formats Familiarity with multi - voltage static checkers (MVRC , CLP , VSILP / VCLP) Familiarity with power estimation tools , such as PrimeTime - PX , PowerArtist or PowerPro is a plus Silicon power measurement is a plus Strong communication skills are a pre - requisite as the candidate will interface with a lot of different groups Educational Qualification BS / MS EE , EC , or CS Notice Period: 3 - 4week,

Keyskills :
comclpasicdesignsiliconprimetimeestimationsimulationasicdesignarchitectureupfcircuitvoltageanalysis

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