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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Recruitment Services |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Roles and responsibilities Qualification: BE/ B. Tech/ ME/ M. TechExperience: 5-10 yrsLocation- BangaloreJob DescriptionWork Experience in Advanced Constraint Verification & post-layout STAExpertise in Low Power Formal VerificationExpertise in Constraint Development (Functional, DFT) Knowledge on IP constraint on DDR3/ 4, Multiprotocol SerDes, ARM core and Subsystem, USB3. 0 etc a big plusExpertise in MCMM definitionsKnowledge in Abstraction definition and creation (ETM/ ILM/ Hyperscale) Knowledge on Extraction & PTSI pruning parameter definitionsFILL aware timing strategies/ flow definitionDMSA and ECO strategy definitionsClock scaling AnalysisIf interested please send your UPDATED Profile with below mentioned details. Current CTC: Expected CTC: Notice Period: Reason for Job Change: Availability of interview: Please Note: This is a mass mail. If this profile is not suitable to you, then please ignore this mail or refer someone who may be suitableWith Regards, ReshmiAarna HR SolutionsHR RecruiterMob No: 9902579718 Additional Information All your information will be kept confidential according to EEO guidelines,
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