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Job Location | Bangalore |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | IT - Software |
Functional Area | Embedded / System Software,Embedded, VLSI |
EmploymentType | Full-time |
Job ID: JR0165617Job Category: EngineeringPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HireMicro Architecture and RTL DesignJob DescriptionPerforms logic design Register Transfer Level RTL coding and simulation to generate cell libraries functional units and subsystems for inclusion in full chip designs Participates in the development of Architecture and Microarchitecture specifications for the Logic components Provides IP integration support to SoC customers and represents RTL teamQualificationsBachelor in Engineering with 12 years of experience in RTL coding and IP designAs a technical lead should be able to independently develop and drive various logic design activities including microarchitecture Developing RTL code from high level specs ensuring end to end design quality in terms of LintCDCDFTSynthesisSTAFormal Equivalence etcShould be able to provide technical leadership and direction to junior design engineers in the group and able to come up with technical proposals helping implementationAssist PreSilicon Verification team in developing Test plan and test coverage Review the coverage reports from regression tests and provide feedback to verification teamCollaborate with system validation and Firmwaresoftware teams for platform level debug Work with structural design team to close floorplan and static timing on the blockPerforms logic design Register Transfer Level RTL coding and drives simulationemulation to make sure quality of the IPParticipates in the development of Architecture and Microarchitecture specifications for the Logic components Provides IP integration support to SoC customers and represents RTL teamShould provide technical expertise to post silicon team to help achieve Product qualityBe able to interact with various stake holders internal as well as external to drive end 2 end quality design objectives within stipulated schedule timelinesExcellent communication and interpersonal skills are criticalExperience in High speed serial protocol is added advantageInside this Business GroupIP Engineering Groups (IPG) vision Build IPs that power Intels leadership products and power our customers silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intels silicon design process. IPGs guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJR0165617Bangalore,
Keyskills :
rtl codinglogic designtest coveragestructural designbehavioral traininginterpersonal skillstechnical leadershipsocrtlcelltestsdesigndrivestimingsiliconips