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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
We have urgent opening for Physical Design for Bangalore location.The candidate will participate in the physical design aspects of the cores, including floor planning, placement, clock tree synthesis, routing, and ECO timing closure Strong knowledge and experience in Physical Design of IP blocks and/or full chips. . Strong hands-on Experience in various aspects of Physical Design flow Floor planning, Placement, CTS, Route, timing analysis and eco flows. 16FF/10FF/7FF Technologies exp must. Strong knowledge of PD tools like Synopsys ICC (II) and/or Cadence Innovus required.Knowledge and exposure to STA (primetime), EMIR analysis, DRC/LVS analysis and fixing desired. Exp:6-18 years Location: Bangalore If interested share resume on priyanka@techstosuit.comSalary: Not Disclosed by RecruiterIndustry: IT-Software / Software ServicesFunctional Area: IT Software - Embedded, EDA, VLSI, ASIC, Chip DesignRole Category: Programming & DesignRole: Project LeadEmployment Type: Full Time, Permanent ,
Keyskills :
clocktreesynthesis designflow planning timingclosure physicaldesign timinganalysis it ip eda sta eco icc vlsi asic design timing resume routing closure cadence lo