Physical Verification

Job Description

*Summary of Role:GLOBALFOUNDRIES is looking for a highly motivated engineer with 3 years or more of experience in the semiconductor industry to work in the Global Shuttle MPW team located in Bangalore, India. This is an excellent opportunity for an engineer to pursue a professional career with a world leading Semiconductor Technology Company.The Global Shuttle MPW team enables customers around the globe to prototype their chip designs on Multi Project Wafers (MPWs) and gives all required support to them to make their silicon prototype successful and eventually turn it into a product manufactured at GLOBALFOUNDRIES. MPW runs are offered by GLOBALFOUNDRIES for a large variety of technologies, from leading edge FinFet to State-of-the-Art BiCMOS, RF and Silicon Photonics, manufactured in Fabs located in Singapore, US and Germany.The Global Shuttle MPW team belongs to GLOBALFOUNDRIES Pre-and Post Fab Operations organisation and is a global team with offices in the U.S., Singapore, India and Germany.Essential Responsibilities:

• To work with customer interface (FAE) and internal teams to collect and document information required to execute MPW tapeouts. Align on and Post MPW Schedule
• To ensure all reservations are made to meet the MPW schedule
• To understand and document requirements for the MPW (metal stacks, bump requests, wafer/die delivery, IP protection)
• To work with external and internal customers to successfully tapeout their chip design prototypes on MPW which includes GDS layout review, DRC analysis and DRC waiver closure, and layout design services (dummy fill and metrology insertion) for all technologies offered by GLOBALFOUNDRIES
• To track Design Readiness and review GDS for accurate Stack, Block Size, Features etc.
• To work with the mask data preparation and Fab teams on mask generation and Silicon route setup, which includes preparation and submission of all required tapeout request forms
• To support best-in-class cycle times from customer GDS-in to Masks-in-FAB
• To help drive continuous improvement projects to constantly improve the efficiency and quality of Global Shuttle Operations and establish, implement, document, and continuously improve business processes and quality systems related to ensuring efficient and flawless MPW tape-outs
• To strongly collaborate with the various global teams like Process Integration and Technology Development, Customer Engineering, Field Engineering and others in order to quickly resolve issues and provide customer or Fab feedback where needed
• To perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs

, *Skills and Abilities:

• Work in a dynamic collaborative environment requiring strong teaming skills with programmers, engineers, managers, and production employees
• Strong ability to learn and explore new technologies and who are able to demonstrate good analysis and problem solving skills are preferred
• Ability to develop critical functionalities consistently and in a timely manner

Required Qualifications:

• Master Degree in Electrical Engineering, Computer Science or other relevant engineering disciplines and first relevant experience in the described fields are required
• 3+ years relevant experience in semiconductor design environments, a general understanding of tapeout flows from GDS to mask generation
• Strong interpersonal skills and ability to work effectively in cross-functional teams and with different cultures across different sites
• Independent, positive attitude and customer-advocate mindset in managing projects, operational challenges and driving long term preventive measures
• Detail-oriented with first-time right quality output
• Language Fluency English (Written & Verbal)
• Good verbal and written communication skills

Preferred Qualifications:

• PhD in Electrical Engineering, Computer Science or other relevant engineering disciplines and first relevant experience in the described fields are required
• Knowledge on physical verification tools like Calibre DRC and LVS, experience in Mentor Calibre LVS/DRC and SVRF rule writing, UNIX based script development and WEB programming skills, Scripting languages as well as analog/mixed-signal design tools like Cadence
• UNIX based script development
• Expert in one of TcL, Python, XML, Javascript, basic knowledge in the other languages

Keyskills :
chip designglobal teamslayout designproblem solvingquality systemscomputer sciencedata preparationwork effectivelyfield engineeringsilicon photonicsprocess integrationinterpersonal skillsphysical verification