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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.*ASIC/Processor Design Verification position*Own all aspects of block/sub-system design-verification:*test-plan creation/execution*test-bench (all components) creation/enhancement/maintenance*code/functional coverage* Will be involved in post silicon validation/bring up* Bangalore (India) based positionJob Requirements:* Strong expertise in building test-benches using: System-Verilog, UVM, C/C* Strong digital logic fundamentals and understanding* Experience in functional coverage/code coverage/assertions (SVA) development and closure* Experience in creating and maintaining *executable* test plans* Strong debug skills* Proficient in scripting/automation using any standard scripting language like Perl etc.* Emulation related experience will be a plus* Excellent verbal and written communicationWe re doing work that matters. Help us solve what others can t.,
Keyskills :
lightingestimation3d modellingahuauditingdesign verificationuvmperldesignsiliconscriptingemulationfundamentalsAMBA AHBSpecmanOpen Verification MethodologyNCSimUniversal Verification Methodologycadence