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RTL Engineer-LTE / 5G

4.00 to 9.00 Years   Bangalore   17 Sep, 2020
Mobiveil, Inc
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

  • The candidate would be a Hands-on engineer having following expertise.
  • Sound knowledge of RTL frond end design principles.
  • Excellent command over HDL Verilog/VHDL.
  • Must have FPGA design principles. Working with Xilinx/Altera FPGA.
  • Must have done RTL synthesis, constraints design, timing closure, RTL designs having CDC.
  • Must have written test benches to verify the RTL design.
  • Must have used the RTL development and debugging tools for FPGA (e.g. vivado for Xilinx).
  • Must have implemented at least a few communication signal processing blocks in RTL (e.g. FFT/IFFT, AGC, Channel Estimation/Equalization, DPD, CFR, Turbo Enoder/Decoder).
  • Must have good understanding of PHY Layer of at least one OFDM based wireless technology (e.g. 5G/LTE/ WiFi/WiMAX). LTE experience is Must.
  • Must know where to use FIFO or RAM in the design. Must have used FIFOs/RAM in the design.
  • Should know how to write configurable RTL.
  • Should have used CPRI/OBSA IPs to interface with the RF unit in a wireless communication system.
  • Understanding of RF fundamentals, RF components, RF chain and it s working is advantageous.
  • Ability to learn quickly in a highly dynamic work environment.
  • Ability to multi-task
,

Keyskills :
fpga designtiming closurertl developmentsignal processingwireless communicationltephyrtlramhdlcfrfpgavhdlwifiofdmfifosoundertmsips

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