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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Consumer Durables / Electronics |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
About MarvellAt Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world s leading technology companies for 25 years, we move, store, process and secure the world s data with semiconductor solutions designed for our customers current needs and future ambitions. Through a process of deep collaboration and transparency, we re ultimately changing the way tomorrow s enterprise, cloud, automotive, and carrier architectures transform for the better.The data infrastructure that our customers build has never been more critical to our global economy. It s what s keeping the world connected, businesses running, and information flowing. If you re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.The OpportunityIn this role, you will be part of the CentralEngineering team playing a key role in delivering CMA (Compilable Memory Array) to the various products across the Marvell BUs.You will be responsible for the Verilog generation for compliable memoriesincluding the ability to allow for SDF back annotation and other EDA view generation such as CCS-NOISE and merge in with our normal timing/power LIBs,PWL to support Voltus (piece wise linear view of current, trigger files, etc.).Education, Knowledge, Skills and Abilities:
Keyskills :
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