Senior/ Lead DFT Engineer

4.00 to 9.00 Years Bangalore 25 Mar, 2021

Job Location	Bangalore
Education	Not Mentioned
Salary	Not Disclosed
Industry	IT - Software
Functional Area	General / Other Software
EmploymentType	Full-time

Job Description

Incumbent will be responsible for Scan insertion and validation, IP Test, IO Tests, BIST, MBIST insertion and validation, ATPG and Pattern validation w/wo Timing, DFT mode timing Analysis and sign off.
Be responsible for a comprehensive DFT plan
Incumbent to work with DFT and cross functional teams
To architect and implement solutions for Scan and built-in self-test (Memory and Logic BIST) circuitry to test devices in SoC/chip
The Lead engineer to Coordinate all DFT activities
Assist to close STA timing across all DFT modes for blocks and top.
Responsible for digital design automation, flow-automation
To ensure successful delivery of all the project deliverable to customerss

Keyskills :
atpgdftscancoresilicondigital designscan insertiontiming analysisdesign automationstabisttestsdesigntimingpatternanalysisautomationvalidationBiCMOS

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Senior/ Lead DFT Engineer

Job Description

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