| Hyderabad Jobs |
| Banglore Jobs |
| Chennai Jobs |
| Delhi Jobs |
| Ahmedabad Jobs |
| Mumbai Jobs |
| Pune Jobs |
| Vijayawada Jobs |
| Gurgaon Jobs |
| Noida Jobs |
| Hyderabad Jobs |
| Banglore Jobs |
| Chennai Jobs |
| Delhi Jobs |
| Ahmedabad Jobs |
| Mumbai Jobs |
| Pune Jobs |
| Vijayawada Jobs |
| Gurgaon Jobs |
| Noida Jobs |
| Oil & Gas Jobs |
| Banking Jobs |
| Construction Jobs |
| Top Management Jobs |
| IT - Software Jobs |
| Medical Healthcare Jobs |
| Purchase / Logistics Jobs |
| Sales |
| Ajax Jobs |
| Designing Jobs |
| ASP .NET Jobs |
| Java Jobs |
| MySQL Jobs |
| Sap hr Jobs |
| Software Testing Jobs |
| Html Jobs |
| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Manufacturing |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Duties: Develop micro-architecture and RTL design for digital components for memory and serdes PHY IPs Generating soft-macros (RTL) to be used in test-chip/ product designs Setup and analysis of lint, synthesis, timing closure and DFT reports Support Customer integration activities QualificationsSkills/ Qualifications: Electrical/ Electronic Engineering with at least 4 to 7 years of experience in Logic design, Micro architecture definition Experience working with multiple clock domains, high speed designs Experience with synthesis flow, hands on timing closure, ECO iterations Knowledge of memory (DDRx/ HBM/ GDDRx) , serdes technology such as - PCI Express, Ethernet, USB is a plus Experience working in a multi-site environment,
Keyskills :
cadence controlling diagnostics fft gsm rtldesign phy dft rtl ips pci eco lint design macros serdes ogicdesign timingclosure usb timing