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SMTS Verification Engineering

3.00 to 6.00 Years   Bangalore   29 Jul, 2021
Rambus Inc
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryManufacturing
Functional AreaSales / BD
EmploymentTypeFull-time

Job Description

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Verificatoin Engineer to join our IDC verification team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

Responsibilities
  • Understand design specification, define verification TB architecture, create verification plan and environment.
  • Participate in technical discussions and represent verification team in all the discussions with internal and external customers.
  • Fully accountable for quality design verification as per the schedule.
  • Track the verification progress, identify potential risks, and mitigation plan.
  • Review all technical deliverables from team members and guide team members to meet quality and the schedule.
  • Contribute to verification process and methodology improvements to boost efficiency and productivity.
Qualifications
  • Bachelors/Masters degree in Electronics/Electrical Engineering
  • 5 years of verification experience
  • Expert in verification tools, flow, methodology, and good track record of achieving verification excellence.
  • IP verification experience either in Serdes or memory IP domain, In-depth understanding of design architecture features and used cases.
  • Sound verification knowledge of mixed-signal design at Verilog and AMS level.
  • Should have knowledge on all aspects of verification components verification closure.
  • Hands-on experience on block, IP and system level verification.
  • Should have involved in IP verification from verification plan to final verification signoff for minimum of 2-3 IPs.
  • Should have flair for documentation, defining/improving methodology and achieving productivity improvement
  • Good on project planning, resource estimate and breaking verification work into independent tasks. Identify potential risks, present/discuss risks, problems, mitigation plan with project stake holders.
  • Expert on coverage driven verification methodology, functional and code coverage closure.
  • Hand-on experience on GLS and SDF verification, optimizing the GLS run time and performance.
  • Excellent in communication and interpersonal skills, demonstrate teamwork and collaboration skills.

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Keyskills :
verificationuvmdesignfailure analysisenvironmental impact assessmentcode coverageproject planningdesign verificationinterpersonal skillstechnical discussionsproductivity improvementidcglsamssoundboostserdesverilogstatements of work so

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