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Sr Engineer Design Enablement/RTL TO GDS

5.00 to 0.00 Years   Bangalore   30 May, 2020
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryManufacturing
Functional AreaEngineering Design / Construction
EmploymentTypeFull-time

Job Description

Key area of the position: Physical Design with STAThis position reports into the Design Methodology group and will be part of a team that is responsible for the creation of Design Methodology solutions for a wide variety of Technology nodes. Your role is focused on the development of Digital design enablement collateral to help GLOBALFOUNDRIES customers adopt the most advanced silicon technologiesSpecific Responsibilities

  • RTL2GDS flow creation and qualification for Synthesis, Place and Route, Extraction, Timing and Physical Verification
  • Will be closely collaborating with EDA vendors and PDK to define, implement, customize, and qualify digital design flows
  • Uses TCL, Python, Pandas and Google APIs to create automation for flow regressions, to collect and compare flow errors, warnings and key design metrics to ensure good quality PDK release and released flow backward compatibility to PDK
  • Use reference flows to perform cross tool and PDK PPA benchmarking
  • Define and generate design testcases to target and measure specific aspects of GLOBALFOUNDRIES PDK and technology changes
  • Work independently in an international team, to drive project definition, execution, and delivery
  • Perform all activities and responsibilities in safe and responsible manner and support all Environmental, Health, Safety, Security requirements and programs
, Required Qualifications
  • Very good understanding of process technology, digital design, and digital implementation and analysis EDA tools and flows.
  • Deep hands-on experience with digital implementation tools and flows (i.e. Synopsys ICC/ICC2, Cadence EDI/INNOVUS, or Mentor OlympusSoC) including RTL synthesis, Place and Route, parasitic extraction and static timing (Synopsys or Cadence) and physical verification (Mentor, Synopsys, or Cadence) using advanced technologies like 12/14/28 technologies
  • Strong EDA tool scripting using TCL, Make and proficiency in Python programming language, data structures, functions and OOPs
  • Strong communication skills within a global team and the ability to define and execute projects independently
  • Masters degree + 5 years or Bachelor degree + 7 years of relevant work experience. Masters or Bachelors degree in electrical or computer engineering fields is required
Preferred Qualifications
  • Google docs API programming
  • Low power design techniques and UPF (IEEE 1801)
  • Understand liberty (.lib) formats (NLDM, CCS, ECSM, AOCV/POCV/LVF)
  • Hands-on experience using version control software like Perforce.
  • Java, SQL are also preferred.

Keyskills :
eda toolstest cases digital designphysical design data structurescontrol software parasitic extractionphysical verification

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