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Staff Design Verification Engr

2.00 to 6.00 Years   Bangalore   01 Oct, 2019
Cypress Semiconductor Technology India Pvt Ltd
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryConsumer Durables / Electronics
Functional AreaGeneral / Other SoftwareSales / BD
EmploymentTypeFull-time

Job Description

Excellent knowledge of verification methodologies for IP, sub-system and full chip verification. Capable of analyzing verification techniques with a view towards finding functional failures or bugs at the block, subsystem and chip levels. Aware of system level functions, applications and architectures.

Receives no direction on routine assignments and general instructions on new assignments. Decisions, recommendations, and the ability to obtain results impact programs to meet schedules.

Aids designers on specific functional debug. Provides guidance to the work of a verification engineer. Works with Test and Product engineers to develop and validate test vectors. Acts as a leader of small verification projects such as subsystem verification. Interacts with architects and designers of IP blocks or subsystems to ensure development and attainment of coverage goals and metrics.

Adapts to new technologies, product and logic functionality with ease. Verifies moderately complex logic. Schedules short term goals with demonstrated accuracy. Assists with definition of long-term project goals.

Skills
  • Fluent in High-Level Verification languages such as System Verilog, Vera, E, Specman
  • Expert in a verification methodology such as UVM/OVM/RVM
  • Strong knowledge of ASIC Simulation Tools and methodologies as well as ARM based SOC verification experience. Experience in creating Test-plans and executing directed and random testcases.
  • Strong scripting skills in Perl, Python, shell etc.
  • Knowledge of USB/USBPD/Type-C protocol is a desirable
    • ,

    Keyskills :
    system verilogsoc verification arm socperl asicvera pythonverilog

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