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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Recruitment Services |
| Functional Area | IT Operations / EDP / MISSales / BD |
| EmploymentType | Full-time |
Skillset Must have Strong experience and deep knowledge with C++, SystemC and TLM2.0 Strong experience in use of SystemC for modelling and / or verification Experience using simulation and synthesis tools from Cadence, Mentor, or Synopsys Excellent written and verbal communication skills A desire to lead high quality technical training courses. Nice to have Strong experience and deep knowledge with one or more of the following languages: SystemVerilog, e, Vera, C, C++ Strong digital hardware design and verification skills using VHDL or Verilog Strong experience and deep knowledge with one or more of the following methodologies: UVM, OVM, eRM, VMM Experience with one or more of the following languages: Tcl, Perl, Unix scripting Experience in a customerfacing role such as training, consultancy, or application engineering Experience Must have 5+ Years Of Experience Performing feature extraction from a specification Coverage closure Experience in Specman and eRM Nice to have Experience in SOC Block Level Verification Job Description Responsibilities Develop Verification Plan and Verification Architecture Develop Tests and Testbench.
Keyskills :
vmm perl nixscripting verbalcommunication featureextraction technicaltraining communicationskills hardwaredesign applicationengineering