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Job Location | Bangalore |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | IT - Software |
Functional Area | General / Other Software |
EmploymentType | Full-time |
Job ID: JR0131632Job Category: EngineeringPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HireValidation EngineerJob DescriptionThe Silicon Engineering Group/Config IPs & Chassis Group is looking for energetic and passionate senior Verification Technical Lead for high speed serial link digital IP/complex system IPs.Expertise in OVM/UVM methodology with strong system-Verilog/System-C/OOPs know how. Experience in developing complex protocol monitors, checkers, scoreboard & coverage is highly desired.- Domain experience of high speed serial links (specially PCIe and coherency protocols) is needed. Understanding of global flow like DFT/DFD/Power management etc is added advantage.- Responsibility includes defining testbench architecture and executing overall testplan to achieve first time production worthy quality of the IP/Subsystem.- In this role, you will be required to interact with various stake holders to achieve end to end goals. You will also be responsible to mentor/coach some of the junior verification engineers working in the team.QualificationsCandidate should possess a Bachelors degree with 12-17 years experience or a Masters degree with 10-15 years experience in VLSI, Electronics, Electrical, Computer Engineering or Computer Science (from reputed colleges like IIT/NIT, global universities).Inside this Business GroupThe Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.,
Keyskills :
validation debugging testcases customerrelations computerscience behavioraltraining vlsi pcie color science chassis silicon business protocol religion engineers management leadership ntel ips