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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Consumer Durables / Electronics |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Job Id E1971690 Job Title Validation Engineer, Sr lead Post Date 03/17/2020 Company Qualcomm Technologies, Inc. Job Area Engineering - Hardware Location India - Bangalore Job Overview Understand the IP architecture, work with IP validation teams and Systems validation Lead/system content engineer to understand the validation requirements, develop/port/enhance the validation software content and bring up. -Use silicon debug hooks to measure power/performance/coverage and other KPI metrics Senior engineers are expected to work with very minimal supervision and mentoring junior engineers Minimum Qualifications * Bachelors degree in Engineering, Information Systems, Computer Science, or related field.* 4+ years Hardware Engineering experience or related work experience. id= hdnMinimumQualifications >MINIMUM QUALIFICATIONS:* Bachelors degree in Engineering, Information Systems, Computer Science, or related field.* 4+ years Hardware Engineering experience or related work experience. Preferred Qualifications Basics of processor architecture, Multicore/Multiprocessor with SMP/heterogenous cores. -C language expertise for low level programming, Assembly language for any processor, C-assembly interworking -Operating systems/RTOS/Linux kernel internals, scheduling policies, locking mechanism, MMU/paging etc -Exposure to working on emulation/pre-si environment is added advantage -Using JTAG based debuggers, compilers/linkers -Should have good exposure to software development life cycle-Exposure to SoC architecture paradigms interconnects, power management, -Software development for silicon enablement, silicon validation -Bring-up of hardware-software solution on FPGA/emulation platforms and on fresh SOC designs -Software for power/performance KPIs -Good knowledge of ARM Cortex-A7) / x86 / PowerPC CPU and memory system architecture -Weakly ordered memory model/pipelining of memory systems/memory barriers -Software development towards higher performance of multi threaded applications using lower power -Top level of ASIC design methodology is an added skill Education Requirements L1-IND* id= hdnEducationalRequirements >Bachelors degree in Engineering, Information Systems, Computer Science, or related field.,
Keyskills :
test casescustomer relations low level programmingasic design computer sciencepower management assembly languagesilicon validati