Wireless R&D Modem Verification

Job Description

Mobile handsets powered by QCT chipsets can offer more features while maintaining a smaller, sleeker form-factor and benefiting from reduced power demands. QCT values collaboration with its customers and partners and works closely with them to enable their success. We offer a wide range of tools to support the device development process, and develop new technologies based on the needs and demands of the wireless market QCTs Bangalore Wireless R&D HW team is looking out for experienced Wireless Modem HW verification engineers to work on Qualcomms best in class chipsets and WLAN/Cellular/GNSS modem IPs Roles and Responsibilities of Digital Verification: - You will be contributing to Wireless Modem/WLAN/GNSS IP cores verification at sub-block/block/Core/Sub-system level. Candidate must be able to take ownership of block/IP/core verification. Incumbent will be analyzing HW design, HLDRs and develop a verification test plan/strategy around it. He/She will work with design team on RTL debug during Pre-silicon HW development phase. Being adaptable and ability to work at various abstraction levels : Block/Core/IP/SS level. Demonstrate strong coding skills in System Verilog and UVM. Knowledge on AMBA bus protocols (AXI/AHB) is highly desired. Ability to code Assertion for temporal logic testing. Scripting languages like Perl/Python and development test automation framework for regression automation. Deep understanding of Code/Functional coverage report, identify why coverage holes, ability to develop new and closing with design/systems team. Experience with power-aware verification and GLS is a must.Performance verification for throughput/latency analysis would also be job requirement on selected blocks. Day-to-day job functioning includes: HW verification using Cadence and Synopsys simulator tools, SV/UVM based TB development, Regression analysis, bug-triage. In addition to functional verification, usage of Formal tools (Jasper) for Formal verification. Conducting High-/Mid-/Low- level verification reviews, coverage closure and sign-off on block testing. Assisting SOC team with IP Integration testing at SOC level Datapath knowledge and decent understanding as well as working knowledge with atleast one of these Radio technologies : IEEEE802.11 WLAN, 3GPP [LTE/5G] , 3GPP2 standards [CDMA2000], , Bluetooth, Wimax, GPS will be a big plus. Minimum Qualifications 4+ years Hardware Engineering experience or related work experience.Bachelors degree in Engineering, Information Systems, Computer Science, or related field.4+ years Hardware Engineering experience or related work experience. Preferred Qualifications Qualcomm CDMA Technologies (QCT) is the largest provider of Wireless chipset software technology in the world. QCT provides complete chipset solutions and integrated applications from the Launchpad suite of advanced technologies. Our integrated solutions offer device manufacturers reduced bill-of-materials costs, time-to-market, and development time. Mobile handsets powered by QCT chipsets can offer more features while maintaining a smaller, sleeker form-factor and benefiting from reduced power demands. QCT values collaboration with its customers and partners and works closely with them to enable their success. We offer a wide range of tools to support the device development process, and develop new technologies based on the needs and demands of the wireless market QCTs Bangalore Wireless R&D HW team is looking out for experienced Wireless Modem HW verification engineers to work on Qualcomms best in class chipsets and WLAN/Cellular/GNSS modem IPs Roles and Responsibilities of Digital Verification: - You will be contributing to Wireless Modem/WLAN/GNSS IP cores verification at sub-block/block/Core/Sub-system level. Candidate must be able to take ownership of block/IP/core verification. Incumbent will be analyzing HW design, HLDRs and develop a verification test plan/strategy around it. He/She will work with design team on RTL debug during Pre-silicon HW development phase. Being adaptable and ability to work at various abstraction levels : Block/Core/IP/SS level. Demonstrate strong coding skills in System Verilog and UVM. Knowledge on AMBA bus protocols (AXI/AHB) is highly desired. Ability to code Assertion for temporal logic testing. Scripting languages like Perl/Python and development test automation framework for regression automation. Deep understanding of Code/Functional coverage report, identify why coverage holes, ability to develop new and closing with design/systems team. Experience with power-aware verification and GLS is a must. Performance verification for throughput/latency analysis would also be job requirement on selected blocks. Day-to-day job functioning includes: HW verification using Cadence and Synopsys simulator tools, SV/UVM based TB development, Regression analysis, bug-triage. In addition to functional verification, usage of Formal tools (Jasper) for Formal verification. Conducting High-/Mid-/Low- level verification reviews, coverage closure and sign-off on block testing. Assisting SOC team with IP Integration testing at SOC level Datapath knowledge and decent understanding as well as working knowledge with atleast one of these Radio technologies : IEEEE802.11 WLAN, 3GPP [LTE/5G] , 3GPP2 standards [CDMA2000], , Bluetooth, Wimax, GPS will be a big plus. Education Requirements B.Tech/M.Tech/M.Sc in ECE/EE/CSA/Signal Processing department from IIT/NIT/IISC/BITS Keywords,

Keyskills :
hw designsystem verilog hw developmenttest automation computer sciencedevice development integration testingregression analysis