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| Job Location | Chennai |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Consumer Durables / Electronics |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Experience level 3- 6 years experience.Strong knowledge of digital design and SOC architecture.Good understanding of OOP conceptsExperience in HVL such as System Verilog, UVM/ OVM & System CExperience in HDL such as VerilogExposure to Version managers like Clearcase/ perforce Scripting language like Perl, Tcl or PythonAnalytical and Debugging skillsLow Power Design Verification Power AwareMultimedia design verification (G,
Keyskills :
systemverilog digitaldesign designverification tcl soc oop ovm hdl hvl perl design verilog ce scripting debugging BiCMOS Primetime RTLCoding erf LowpowerDesign PhaseLockedLoop