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| Job Location | Chennai |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Must have good knowledge on the verification flows Excellent hands - on debug skills Experience of working in complex test - bench / model in Verilog , System Verilog or SystemC OVM / UVM Methodology knowledge and experience Knowledge on one of PCIe , USB , MIPI and NVM - Express protocols will be preferred Knowledge of system - level architecture including buses like AXI / AHB , bridges , AXI interconnects Strong working knowledge of UNIX environment and scripting languages such as Perl or Python Excellent waveform debug skills using front end industry standard design tools like VCS , NCSIM , Verdi , ModelSim Experience: 5+ years Educational Qualification: BS / MS EE , EC , or CS,
Keyskills :
uvm vcs ovm ahb perl unix pcie mipi python design verilog sb axi ncsim verdi