hireejobs
Register for Job
Hyderabad Jobs
Banglore Jobs
Chennai Jobs
Delhi Jobs
Ahmedabad Jobs
Mumbai Jobs
Pune Jobs
Vijayawada Jobs
Gurgaon Jobs
Noida Jobs
Oil & Gas Jobs
Banking Jobs
Construction Jobs
Top Management Jobs
IT - Software Jobs
Medical Healthcare Jobs
Purchase / Logistics Jobs
Sales
Ajax Jobs
Designing Jobs
ASP .NET Jobs
Java Jobs
MySQL Jobs
Sap hr Jobs
Software Testing Jobs
Html Jobs
IT Jobs
Logistics Jobs
Customer Service Jobs
Airport Jobs
Banking Jobs
Driver Jobs
Part Time Jobs
Civil Engineering Jobs
Accountant Jobs
Safety Officer Jobs
Nursing Jobs
Civil Engineering Jobs
Hospitality Jobs
Part Time Jobs
Security Jobs
Finance Jobs
Marketing Jobs
Shipping Jobs
Real Estate Jobs
Telecom Jobs

Senior Technical Manager

10.00 to 15.00 Years   Chennai   27 Mar, 2020
Cambio Consulting
Job LocationChennai
EducationNot Mentioned
SalaryNot Disclosed
IndustryConsumer Durables / Electronics
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

Hi Good day to you.! Openings in Chennai (US based Semiconductor MNC) please go through the Job Descriptions & let me know your interest for the same. Company Name will be Disclosed With your Interest Here attaching the JD for your reference Location :: Chennai Overview:

  • The candidate will be responsible for synthesis/formal verification and design support for next-generation SoCs subsystems for WIFI/Connectivity chips.
  • This role will require the candidate to understand and drive Synthesis, Formal verification, and partner with DFT and PD teams for timing convergence.
  • Synthesis of a subsystem/SOC with multiple Hard Macros
  • FV with LEC in multiple stages of RTL to NL flow.
  • Implement the ECO in NL using conformal flow
  • Work in close coordination with Design, PD, DFT teams to get the goals completed.
  • Analyze reports/waivers and run various tools: DC, DCT, DCG, Genus, Primetime, etc
Preferred Qualifications:
  • Synthesis, LEC, low power checks, Memory BIST insertion, SDC validation.
  • 10-15 years of solid experience in synthesis, formal verification with a design background
  • Expertise in Synopsys DCT/DCG Synthesis/Cadence Genus
  • Expertise in formal verification with Cadence LEC Understanding of RTL to GDS flow
  • Expertise in timing closure, PT runs Expertise in Verilog/VHDL Expertise in Perl, TCL language is a plus Expertise in post-Si debug is a plus Good documentation and communication skills.
Note : If you are not Interested, Kindly refer any of your Friends/colleagues with 2+ yrs Thanks & Regards Bala Koppu Technical Recruiter bala@cambio.co.in ,

Keyskills :
projectmanagement delivery framework documentation research timingclosure designsupport formalverification go dft gds rtl lec eco perl bist design macros timing cl

APPLY NOW

Senior Technical Manager Related Jobs

© 2019 Hireejobs All Rights Reserved