| Hyderabad Jobs |
| Banglore Jobs |
| Chennai Jobs |
| Delhi Jobs |
| Ahmedabad Jobs |
| Mumbai Jobs |
| Pune Jobs |
| Vijayawada Jobs |
| Gurgaon Jobs |
| Noida Jobs |
| Hyderabad Jobs |
| Banglore Jobs |
| Chennai Jobs |
| Delhi Jobs |
| Ahmedabad Jobs |
| Mumbai Jobs |
| Pune Jobs |
| Vijayawada Jobs |
| Gurgaon Jobs |
| Noida Jobs |
| Oil & Gas Jobs |
| Banking Jobs |
| Construction Jobs |
| Top Management Jobs |
| IT - Software Jobs |
| Medical Healthcare Jobs |
| Purchase / Logistics Jobs |
| Sales |
| Ajax Jobs |
| Designing Jobs |
| ASP .NET Jobs |
| Java Jobs |
| MySQL Jobs |
| Sap hr Jobs |
| Software Testing Jobs |
| Html Jobs |
| Job Location | Chennai |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Hardware / Networking |
| Functional Area | MaintenanceService / Installation / Repair |
| EmploymentType | Full-time |
Engineer II Verification Job in Statewide , Tamil Nadu for Microchip Technology Inc. | Technical Job Description To play the role of verification engineer at the Block level , chip level Functional verification. Own a complete Block and verify as per the Plan. Create the test plan , design and develop the verification components. Integration with RTL. (Basic RTL bringup , Generate multiple test cases as per test plan and Run regressions. Also be able to achieve the above tasks as an Individual contributor. Generate Coverage , analyze coverage results and correlate with the test plan. Drive the verification to achieve 100% coverage as per test plan. Report progress of verification to Verification lead as when required. Job Requirements Domain Expertise : AHB , PCIE , USB2.0 , USB3.0 , Ethernet 802.3 standard. Languages (must): Verilog , system Verilog Methodologies: OVM / UVM / VMM ( one of them is a must) EDA Tools (One of them is must): Questasim , VCS , NCSim , NCVerilog Experience in developing Test Bench components in both block level and SOC level. Experience in Creating test plan and Writing test sequence. Strong in simulation and debugging skill including GLS Functional Coverage , Code Coverage & Assertions (OVA , SVA , PSL) (Desirable) Experience in integrating and using third party VIPs (desirable) Ability to work well in a team environment,
Keyskills :
edatools testcases codecoverage systemverilog eda soc rtl uvm gls vcs ovm vmm ahb pcie tamil ncsim design writing verilog sb30