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| Job Location | Chennai |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Consumer Durables / Electronics |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Verification requirement Experience: 5 8 yrs Work Location: Chennai - Strong knowledge of digital design and SOC architecture. - Good understanding of OOP concepts - Experience in HVL such as System Verilog, UVM/OVM & System C - Experience in HDL such as Verilog - Exposure to Version managers like Clear case/perforce - Scripting language like Perl, Tcl or Python - Analytical and Debugging skills - Low Power Design Verification Power Aware - Multimedia design verification (Graphics, Display subsystem, Camera Subsystem etc) - Modem design verification (LTE, WCDMA) or WLAN/Wireless communications - High speed peripheral design verification (USB, PCIE, SATA) and other peripherals like SD, I2S, SPDIF. - Verification of integrated SoCs - Verification of mixed-signal ICs such as Phase lock loops (PLL), mixers, ADCs, DACs, LDOs, and radio architectures. - Modeling of analog functions in System Verilog - Formal Design verification (Jasper, 0-in, IFV, Onespin, SLEC, Model checking) - SimVision or Verdi debug skills - Verification of CPU/Memory subsystem. - Verification of ARM cortex based processor. - Simulation acceleration tool like Veloce/Palladium is a plus, Gate level Simulation bring up and Power. - Digital Logic verification and principles, SoC architecture, communications peripherals, multi-domain clocking, power management, AMBA bus protocols such as AHB and AXI ,
Keyskills :
gate level simulationsystem verilog digital designpower management commercial modelsdesign verification tclarm