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Job Location | Coimbatore |
Education | Not Mentioned |
Salary | Rs 8 - 10 Lakh/Yr |
Industry | Consumer Durables / Electronics |
Functional Area | General / Other SoftwareEngineering Design / Construction |
EmploymentType | Full-time |
Must have minimum Bachelors/ Master degree in Engineering from a reputed institute. Must have 7+ years of work experience in System level Signal and Power Integrity Simulations. Familiar with package and board co-design methodology Has done Package and system level power integrity design methodology Good background in memory system & SERDES architecture Must understand aspects of high speed board design including signal integrity theory and applications, termination strategies, power delivery system Solid theoretical background and understanding in EM and transmission line theory Solid understanding of physical and mathematical fundamentals on the modeling of passive interconnects, noise generation, and signal conditioning The candidate should be proficient with simulations using Spice and comfortable with scripting languages such Perl or Python Self-motivation, teamwork and communications skills are essential ,
Keyskills :
highspeedboarddesignboarddesignpowerdeliverypowerintegritysignalintegritytransmissionlinecommercialmodelssignalconditioningperlspiceertmspythondesignserdesscriptingengineeringeamwarchite