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Custom Layout Engineer

10.00 to 0.00 Years   Hyderabad   31 Mar, 2021
Cyient Limited
Job LocationHyderabad
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaR&D / Product Design,Embedded / System Software
EmploymentTypeFull-time

Job Description

Cyient is a global engineering and technology solutions company. As a Design, Build, and Maintain partner for leading organizations worldwide, we take solution ownership across the value chain to help clients focus on their core, innovate, and stay ahead of the curve. We leverage digital technologies, advanced analytics capabilities, and our domain knowledge and technical expertise, to solve complex business problems.With over 15,000 employees globally, we partner with clients to operate as part of their extended team in ways that best suit their organization s culture and requirements. Our industry focus includes aerospace and defence, healthcare, telecommunications, transportation, semiconductor, geospatial, industrial, and energy.Job Description

  • 10 Years of experience in Analog / Mixed Signal /SERDES Layout.
  • Must have strong skills in layout and floor planning skills and manual routing.
  • Able to execute independently on any Analog / Mixed Signal module layout activity (i.e. from schematics~2~ clean GDSII)
  • Good working experience in Cadence Virtuoso Layout Editor, Mentor Caliber etc.
  • Must have experience in AMS layout porting from x nm to 10/7/5/3nm process nodes.
  • Process node experience from 180nm to 3nm
  • Hands on Experience in Block Level, Module Level, Full Chip Level Layouts.
  • Must have hands on experience in MIPI/LPDDR/SERDES modules.
  • Expertise in PLL ADC, DAC, oscillator, voltage/ current reference circuits and power management blocks etc.
  • Performing various kinds of Analog layouts, implementations from chip-level, floor planning down to complex block level layouts.
  • Should have sound knowledge on tackling DRC/LVS/Antenna/LPE Checks of Analog Layout Verification.
  • Good understanding of CMOS/BiCMOS/SOI/FinFet process
  • Knowledge of various analog layout techniques, understanding of various circuit principles as affected by Layouts such as speed, capacitance, power, noise, and area.
  • Responsible for timely and quality execution of layout design.
  • The ability to work and communicate effectively in a team and to be able to multi-task effectively in a fast-paced working environment.
  • Mentor and guide the team member for successful execution of Layout projects.
  • Good communication skills and proactive at work.
Skills & ExperienceAnalog Layout, Analog Layout Design, Cadence Virtuoso, Cadence Virtuoso Layout Suite, calibre, Calibre DRC, Design Rule Checking (DRC), Good communication and presentation skills, good communication skills, Good communications skills and ability to interact with all levels, Layout Designs, Layout Versus Schematic (LVS), LVS, Virtuoso, Virtuoso XLCyient is an Equal Opportunity Employer.Cyient recruits, employs, compensates, and promotes regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender, gender identity or expression, veteran status, and other protected status as required by applicable law. We are proud to be a diverse and inclusive company where our people can focus their whole self on solving problems that matter.,

Keyskills :
layout designequipment designfunctionaldesign rule checkinglayout versus schematicmixed signalauditinganalog layoutbasiccadence virtuoso layout editordesign rule checking drclayout versus schematic lvs

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