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Job Location | Hyderabad |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | Recruitment Services |
Functional Area | General / Operations ManagementR&D / Product Design |
EmploymentType | Full-time |
Will be working on Custom Layout Analog IPs like PLL, ADCs, DACs, Voltage Reference Generators, High Speed IO s, and custom layout of Standard Cells.Performing verification checks like DRC/LVS/Antenna and fixing violations Work closely with the design engineers and layout engineers in designing and successfully delivering analog layouts. Need to work and review layouts which produce good yield.Skills required:Hands on Experience in Full Chip Layout (Other mixed signal or RF Layout would be plus) Experience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calliber, Verification Tool (Assura or Hercules is plus). Performing various kinds of analog layouts, implementations from top-level, floor planning down to complex block level layouts Knowledge of various analog layout techniques, understanding of various circuit principles as affected by layout such as speed, capacitance, power, noise and area. Should have worked on Analog IC Layout, DRC/LVS/Antenna/LPE Checks, CMOS/BiCMOS Device Physics, CMOS/BiCMOS Fabrication Knowledge Perl and Shell Scripting (Preferred),
Keyskills :
auditingbasicequipmentdesignshellscriptinggraphicssoftwaretestingcadencefunctionalcadencevirtuosolayoutediticlayoutmixedsignalmusicmakingwebdesigninganaloglayoutfloplanningment