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Job Location | Hyderabad |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | IT - Software |
Functional Area | General / Other Software |
EmploymentType | Full-time |
FPGA PROTOTYPING / EMULATION ENGINEER (5 8 years) Skills: Job Locations: Hyderabad Total vacancies: 2 - B.S. or M.S. EE / CS / CE - 5+ years work.FPGA PROTOTYPING / EMULATION ENGINEER (5 8 years) | Skills: B.S. or M.S. EE / CS / CE 5+ years working in the semiconductor industry. Recent FPGA experience including implementation , synthesis (Synplify) , timing closure (Vivado / ISE). Ability to architect , implement and verify modules for FPGA interconnect. Proficient in Verilog , Perl , and Make Both simulation based verification and lab based debug skills on FPGAs. Experience with a source control system , such as Perforce Must be familiar with both Linux and Windows environments Hands on with lab FPGA debug methodologies , such as ChipScope , Identify or others. Hands on experience with lab debug equipment , such as oscilloscopes and logic analyzers,
Keyskills :
control systemtiming closurefpga prototypingperlfpgalinuxtimingwindowsverilogclosurecontrolsynthesisequipmentemulationchipscopesimulationprototypingperfsemiconduct