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| Job Location | Hyderabad |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Consumer Durables / Electronics |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Roles and Responsibilities1. Interfacing with the design teams to ensure DFT design rules and guidelines are met2. The person should have experience in timing concepts3. Generating high quality manufacturing test patterns for stuck-at, transition fault models and through the use of on-chip test compression techniques4. Exercising the LBIST circuitry and ensuring that repeatable signatures can be produced5. Simulating and verifying the ATPG and LBIST patterns6. Working with the product engineering teams on the delivery of manufacturing test patterns7. Developing, enhancing and maintaining scripts as necessaryDesired profile - The candidate must have thorough knowledge of DFT basics such as scan insertion, fault models, ATPG, BIST techniques, and on-chip compression techniques that reduce test time and tester memory. Experience with test tools such as FastScan and TestKompress is highly desirable.Scan/ATPG, knowledge of industry standard DFT features, simulation debug, MBIST,
Keyskills :
atpgdftscancoresiliconcontinuous improvement facilitationscan insertionproduct engineeringbistdesigntimingscriptsfastscanfeaturessimulationengineeringcompressioninterfacingContinuous Improvement CultureKaizen