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R&D Senior Engineer/ Manager/ Senior Manager

4.00 to 9.00 Years   Hyderabad   08 May, 2020
Cambio Consulting
Job LocationHyderabad
EducationNot Mentioned
SalaryNot Disclosed
IndustryConsumer Durables / Electronics
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

Hi Good day to you.! Openings in Hyderabad, Bangalore & NOIDA (US based Semiconductor MNC) please go through the Job Descriptions & let me know your interest for the same. Company Name will be Disclosed With your Interest Here attaching the JD for your reference R&D Senior Engineer/ Manager/ Senior Manager Location: Hyderabad & Bangalore Skills/Experience:

  • 4 to 10 years of industry experience in the following technical areas:
  • Physical design implementation (Floorplanning, CTS, STA) in advanced technologies
  • The roles and responsibilities of engineer to develop expertise across the entire spectrum of RTL2GDSII Implementation i.e. Synthesis, Floorplanning, Power Grid Design, Placement, Clock implementation, Routing, STA, Electrical signoff, Power-Analysis, Physical Verification, Chip finishing etc.
  • Working on cutting edge design(s) and/or processes developing expertise across a mix of designs/technologies/tools. (ARM CPU cores, Graphic Cores, IPs including DDR, FullChips and complex blocks like modems/WLANs etc. )
  • STA tool and timing closure methodologies
  • Power grid, clock tree, and low-power reduction implementation methods
  • Signal integrity and timing closure issues such as OCV/AOCV/Statistical Timing
  • Floorplanning, Placement, CTS
  • Physical Verification, Conformal Low Power (CLP), IR drop analysis, Formal Verification
  • Programming and scripting skills (Tcl, perl and/or C)
  • Candidate should be able to lead and work in a team environment
  • Should be able to manage and lead teams
Note : If you are not Interested, Kindly refer any of your Friends/colleagues with 2+ yrs Thanks & Regards Bala Koppu Technical Recruiter bala@cambio.co.in ,

Keyskills :
safety commissioning site inspection troubleshooting timingclosure physicaldesign signalintegrity spectrummanagement physicalverification ir go sta ddr cpu perl edge ertms design ps

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