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| Job Location | Hyderabad |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Consumer Durables / Electronics |
| Functional Area | IT Operations / EDP / MIS |
| EmploymentType | Full-time |
Responsibilities include leading the development of simulation infrastructure and performance models of various programmable components of these devices including compute, interconnect, memory and network interfaces. The candidate will work closely with architects of the various components and with Xilinx customers to explore and develop optimal architectures and optimize them for performance, power, cost, bandwidth, efficiency and ease-of-use.- MS/M.Tech/PhD with at least 15 years of relevant experience- Strong understanding of SOC Architecture and Microarchitecture tradeoffs and performance analysis- Knowledge and experience in building performance models and simulators- A good understanding of Xilinx FPGA, SOC or ACAP architecture is a plus- Skilled in Objected Oriented Design with C++/SystemC/Python- Experience with basic digital VLSI design- Comfortable reading and writing RTL ( e.g., Verilog),
Keyskills :
bigdata commercialmodels memorycontrollers performanceanalysis buildingperformance communityengagement xilinxfpga soc rtl vlsi fpga care edge leap basic ideal design writing ilinx empower