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Job Location | Hyderabad |
Education | Not Mentioned |
Salary | Rs 1.0 - 6 Lakh/Yr |
Industry | IT - Software |
Functional Area | TestingGeneral / Other Software |
EmploymentType | Full-time |
Understand the SV/UVM/OVM methodology based verification, design specs, translating them to test plans, creating test environments from scratch, writing and running tests. Mentor & guide engineers technically experience in co verification /mixed signal simulation and behavioural modelling BSEE or MSEE with proven design experience is also considered with passion for mixed signal and mixed mode verification. Expert in Analog mixed signal and Mixed mode (Analog, Digital, Firmware) simulations Must have extensive full custom circuit simulation experience using SPICE, SPECTRE, HSIM or equivalent tools as well as RTL verification Strong knowledge and experience in RTL verification and HDL testbench creation using Verilog/System Verilog/VHDL is required Expert in leading edge SOC tools such as Questa ADMS, AMS Designer, VCS-AMS or similar mixed signal simulators Expert in UNIX shell, Perl or TCL scripting is required Multiple successful full chip verification experience is required ,
Keyskills :
shellscriptingtclsocvhdlperlovmuvmfirmwareestvhdlverilog