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| Job Location | Hyderabad |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
5-10 years Experience in Physical Design implementation - Responsible to independently handle the execution and delivery of a medium to complex full chip/blocks RTL2GDS implementation- Played a significant role in multiple tape-outs across 90-22nm designs- Skill Set (all or most of the below list)o Full chip/complex block implementation IO planning ( package i/f, ESD, Multi Voltage), ESD Partioning, Hierarchical flowso power estimation, planning and analysis (static and dynamic IR, EM)o floorplanning, placement & congestion, timing closure, CTS, post CTS flowo PV: DRC/LVS/ GDS checkso schedule recovery, team mentoring, customer interactiono Exposure/knowledge on Synthesis/STA/DFT/LECo Proficient in industry standard EDA tool flows (SNPS & CDN)o Low power implementation, verification.Key skills required for the job are:VLSI Physical Place and Route-L3 (Mandatory)Static Timing Analysis -SI-L3VLSI Physical Verification - DRC-L2, Roles & Responsibilities:Mandatory Skills: VLSI Physical Design Planning Analog Circuit design, Analog Layout, Analog and Mixed signal Verification Language Skills: English Language
Keyskills :
circuitdesignphysicaldesigntiminganalysisphysicalverificationnalogcircuitdesignmixedsignalanaloglayouttimingclosureteammentingpowerestimation