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Job Location | Meerut |
Education | Not Mentioned |
Salary | Rs 50,000 - 3.5 Lakh/Yr |
Industry | Internet / E-Commerce |
Functional Area | Client ServerDBA / Datawarehousing |
EmploymentType | Full-time |
In this role, you will contribute to the DFT (Design for Testability) of complex application-specific integrated circuit (ASIC) designs from design specification to production. You will solve technical problems with innovative and practical logic solutions and evaluate design options to target the highest level of test coverage in mind. In the role of a Manager, you will help build and sustain the DFT team. You will collaborate with other global leads on common flows and methodology. You will technically manage the team to execute and deliver to milestones on time. Googles mission is to organize the worlds information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make peoples lives better through technology. Responsibilities Work on a team of DFT engineers, working closely with RTL and Physical Designer engineers Write basic to complex scripts to automate the DFT flow Develop tests that can be used for production in the ATE flow Develop and manage project schedules for the DFT teams and communicate project status to senior stakeholders.interested candidates are required to send their resume to: tecksolutions9@gmail.com
Keyskills :
hardwareresearchdesigntestsoptionsscriptssoftwareestmatrixtestco-ordinationtestdatatestcoverage