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DESIGN FOR TEST

5.00 to 8.00 Years   Mumbai City   25 Nov, 2022
Acme Services Private Limited
Job LocationMumbai City
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

    DESIGN FOR TESTFrom 5 to 7 year(s) of experienceNot Disclosed by RecruiterMumbaiJob DescriptionRoles and Responsibilities
    • Implement DFT including: at-speed scan, LBIST, MBIST, JTAG, self-test, and IP integration
    • Work closely with synthesis, static timing, and layout engineers to optimize DFT circuits.
    • Generate and verify Test vectors before chip tapeout.
    • Support test vector bringup and debug on ATE.
    • Support silicon failure analysis, diagnostics, and yield improvement.
    • Create innovative DFT solutions to solve testability problems and improve coverage.
    • Automate DFT & test vector generation flows.
    JOB Description (please mention in details) *
    • Deep understanding of DFT concepts such as at-speed scan, LBIST, MBIST, JTAG, self-test, analog DFT, and more.
    • Experience with DFT tools such as Tessent, TetraMax, etc.
    • Scan Insertion and scan compression experience.
    • Memory BIST insertion and verification experience.
    • Logic BIST design and debug experience.
    • Experience with ATPG vector generation, testbench generation, simulation, and debug.
    • Experience with formal equivalence checking (Formality, LEC).
    • Familiar with Verilog and VHDL code.
    • Familiar with IEEE 1149 and 1687.
    • Good understanding of synthesis and static timing principles.
    • Excellent problem solving, debug, and communication skills.
    • Knowledge of analog and digital circuit design, and basic device physics.
    • Able to code using TCL, PERL, PYTHON, C++ or similar.
    • Able to work in a multi-disciplined, cross-department environment
    • Experience working on ATE is a plus.

Keyskills :
ui designuser interface designing

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