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Field Application Engineer - Physical Verification (Calibre)

8.00 to 12.00 Years   Mumbai City   03 Apr, 2021
Mentor Graphics India Pvt Ltd
Job LocationMumbai City
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaNetwork / System Administration
EmploymentTypeFull-time

Job Description

Job Responsibilities

  • Responsible for Field Application Engineering (FAE) activities in the Physical Verification (PV) Domain of VLSI systems
  • From a technical stand-point, understanding customer needs on PV, involve and work with their projects for using right methodologies and Mentor Graphics tools for successful project completion
  • Involve and drive the Tool evaluation/benchmark; Technical product presentations; Methodology/flow development and review; Tool deployment and adoption; drive competitive replacements, Provide support to customers during critical Project implementation/Tepeout phases.
  • Work with Technical Account manager and World Wide account teams for forming strategies and successfully driving Mentor Graphics tools inside customer projects to enable business success for Mentor Graphics
Job Role RequirementsEducational qualifications :
  • Required BE/B.Tech in Electronics & Communications Engineering (E&C), or Electrical and Electronics Engineering (EEE)
  • Desired ME/M.Tech in VLSI or Microelectronics
Work Experience:
  • 8-12 years relevant experience in the Physical Verification area of VLSI domain.
Technical skills:
  • Should have served in positions like Application Engineering / Physical Verification lead / assignments that include Physical sign-off of large ASICs
  • Physical Verification, DRC/LVS and sign-off experience of large Multi-million gate ASICs
  • Strong Layout fundamentals and understanding of physical layout and related physical verification issues at nanometer technologies (90/65/40/28nm), understanding of Design Rules Manual and capability to collaborate with customers for rule writing and development
  • Should be good at scripting and able to develop scripts in TCL/Perl to develop AE-ware for customers
  • Should have a good understanding of transistor fundamentals, layout and physical effects and associated issues
  • Understanding of Parasitic Extraction, 2D & 3D filed solvers, dealing with accuracy related issues, R, C and L extraction
  • Strong working knowledge in EDA tools like Calibre DRC/LVS,DFM, Hercules, PVS, Dracula, Diva, Calibre PERC, Calibre xrc, Star-RC, XACT-3D
  • Understanding the yield, parameters impacting yield, Design for manufacturing techniques like Yield enhancement, CMP, LFD will be a strong plus
  • Knowledge/awareness of AMS (Analog and Mixed Signal) flows/tools like Eldo, Questa ADMS and Pyxis is desired
  • Knowledge/awareness of PnR (Place & Route) flows/tools like Olympus, SOC encounter, ICC is desired.
General/soft skills :
  • Work effectively with sales, marketing, and R&D
  • Ability to work autonomously & ability to functionally lead a team of 2-3
  • Strong verbal and written communication skills; good presentation skills
  • Excellent organizational and time management skills
  • Build and foster relationships with customer and peers with a positive attitude to win business success
  • Good problem solving and debugging skills
  • Willingness for technical sales
  • Should be a good team player
  • Job would involve moderate travel.
#LI-MGRPOrganization: Digital IndustriesCompany: Mentor Graphics (Sales and Services) Private LimitedExperience Level: Experienced ProfessionalJob Type: Full-time,

Keyskills :
technical supportgraphic toolstime managementparasitic extractionphysical verificationwritten communicationelectronics engineeringapplication engineeringmanufacturing techniquesmentor graphics

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